Industry News

Carbon nanotubes have achieved important new results

2025-09-22

With the development of integrated circuit (IC) technology, the scaling of silicon-based metal oxide semiconductor (MOS) field-effect transistors (FETs) is approaching their fundamental physical limits. Carbon nanotubes (CNTs) are considered promising materials in the post silicon era due to their atomic thickness and unique electrical properties, with the potential to improve transistor performance while reducing power consumption. High purity aligned carbon nanotubes (A-CNT) are an ideal choice for driving advanced ICs due to their high current density. However, when the channel length (Lch) decreases below 30nm, the performance of single gate (SG) A-CNT FET significantly decreases, mainly manifested as deteriorating switching characteristics and increased leakage current. This article aims to reveal the mechanism of performance degradation in A-CNT FET through theoretical and experimental research, and propose solutions.

Recent groundbreaking research conducted by academic experts such as Academician Peng Lianmao, Researcher Qiu Chenguang, and Researcher Liu Fei from Peking University has unveiled a significant technological advancement in the realm of carbon nanotube powder. Through innovative dual-gate structures, they have successfully overcome the electrostatic coupling between carbon nanotubes (CNTs) to achieve the Bohr switch limit for carbon nanotube field-effect transistors (CNT-FET).

High-density aligned carbon nanotubes (A-CNTs) in conventional single-gate configurations often face challenges such as bandgap narrowing (BGN) due to stacking, which hinders their inherent quasi-one-dimensional electrostatic advantages. This limitation impacts the performance and efficiency of CNT-based electronics.

Through a combination of theoretical simulations and experimental validations, the researchers have introduced an effective dual-gate structure that significantly reduces the BGN effect. This innovation has enabled A-CNT FETs to achieve subthreshold swing (SS) approaching the Boltzmann thermal emission limit of 60mV/decade and attain a switch current ratio exceeding 10^6. Additionally, the fabricated 10nm ultra-short gate A-CNT dual-gate FETs exhibit exceptional performance metrics, including high saturation current (exceeding 1.8mA/μm), peak transconductance (2.1mS/μm), and low static power consumption (10nW/μm), meeting the requirements of advanced integrated circuits.

The successful implementation of the dual-gate structure in A-CNT FETs not only showcases a major breakthrough in CNT-based electronics but also paves the way for the development of high-performance and energy-efficient electronic devices. This technological advancement holds immense promise for revolutionizing the field of nanoelectronics and opening up new possibilities for the design and fabrication of next-generation electronic components.


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